3.4.3.8.1.17 EOTC3A – End of
Telegram Conditions 3 for Path A
This register is used
only for hardware-controlled automatic telegram reception. It stores the EOTCA settings
that are valid from a valid start of telegram detection (RDSIFR.SOTA) until the end of
the telegram. The sequencer state machine copies its content at a successful RDSIFR.SOTA
check to the EOTCA register.Note: The bit
descriptions are found at the EOTCA target register.
Name: | EOTC3A |
Offset: | 0x0F7 |
Reset: | 0x00 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EOTBFE | RRFEA | TELREA | TMOFEA | MANFEA | SYTFEA | AMPFEA | CARFEA | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 7 – EOTBFE
Bit 6 – RRFEA
Bit 5 – TELREA
Bit 4 – TMOFEA
Bit 3 – MANFEA
Bit 2 – SYTFEA
Bit 1 – AMPFEA
Bit 0 – CARFEA