12.2.3.1 MMUART Initialization Sequence

  1. Release the MMUART from reset by using SOFT_RESET_CR system registry (Table 12-2).
  2. Disable the MMUART interrupts by using Interrupt Enable Register (Table 12-12 ).
  3. Clear the transmit and receive FIFO of MMUART by using FIFO Control Register (Table 12-7 ).
  4. Clear the loopback and remote loopback modes by using Modem Control Register (Table 12-18 ).
  5. Configure MMUART to send/receive MSB or LSB as a first bit by using Multi-Mode Control Register 1 (Table 12-23 ).
  6. Set default transmit and receive ready by using ENABLE_TXRDY_RXRDY bit of FIFO Control Register (Table 12-7 ).
  7. Disable 9-bit address flag mode and single-wire mode by using Multi-Mode Control Register 2 (Table 12-24 ).
  8. Disable transmit time guard and fractional baud rate by using Multi-Mode Control Register 0 (Table 12-22 ).
  9. Set default receive timeout by using Multi-Mode Control Register 0 (MM0) and Receiver Timeout Register (Table 12-27 ).
  10. Set transmit time guard by using Transmitter Time Guard Register (Table 12-26 and ).
  11. Set input filter length to suppress spikes by using Glitch Filter Register (Table 12-25).
  12. Configure the baud rate of MMUART by using Baud Rate Registers (Table 12-8, Table 12-9, and Table 12-10).
  13. Set the word length, stop bits and parity of MMUART by using Line Control Register (Table 12-17 ).
  14. Disable LIN header detection and automatic baud rate calculation, RZI modulation/demodulation and smart card modes by using ELIN(Table 12-22), EIRD(Table 12-23), and EERR(Table 12-24) bits.