9.3.10.13 EPx_FIFO_SIZE_REG Bit Definitions
| Bit Number | Name | Reset Value | Function |
|---|---|---|---|
| [7:4] | EPx_Rx FIFO Size | N/A | Returns the sizes of the FIFOs
associated with endpointx. The lower nibble, [3:0], encodes the size of the
transmit FIFO; the upper nibble, [7:4], encodes the size of the receive
endpoint FIFO. Values of 3 – 13 correspond to a FIFO size of 2n bytes (8 – 8192
bytes). If an endpoint has not been configured, a value of 0 gets displayed.
When the transmit and receive endpoints share the same FIFO, the Rx FIFO size
is encoded as 0xF. The register only has this interpretation when the Index register is set to select one of endpoints 1 – 15 and dynamic sizing is not selected. It has a special interpretation when the INDEX_REG is set to select endpoint 0; the result returned is not valid where dynamic FIFO sizing is used. |
| [3:0] | EPx_Tx FIFO Size | N/A |