5.5.47 DSI Interrupt Force Control Register 0
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Forces the triggering of the corresponding interrupt source.
Name: | DSI_INT_FORCE0 |
Offset: | 0xD8 |
Reset: | 0x00000000 |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | | | | | | | |
Access | | | | | | | | | |
Reset | | | | | | | | | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | | | DPHY_ERRORS_4 | DPHY_ERRORS_3 | DPHY_ERRORS_2 | DPHY_ERRORS_1 | DPHY_ERRORS_0 | |
Access | | | | W | W | W | W | W | |
Reset | | | | 0 | 0 | 0 | 0 | 0 | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ACK_WITH_ERR_15 | ACK_WITH_ERR_14 | ACK_WITH_ERR_13 | ACK_WITH_ERR_12 | ACK_WITH_ERR_11 | ACK_WITH_ERR_10 | ACK_WITH_ERR_9 | ACK_WITH_ERR_8 | |
Access | W | W | W | W | W | W | W | W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACK_WITH_ERR_7 | ACK_WITH_ERR_6 | ACK_WITH_ERR_5 | ACK_WITH_ERR_4 | ACK_WITH_ERR_3 | ACK_WITH_ERR_2 | ACK_WITH_ERR_1 | ACK_WITH_ERR_0 | |
Access | W | W | W | W | W | W | W | W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 20 – DPHY_ERRORS_4 D-PHY Errors 4 Force
Bit 19 – DPHY_ERRORS_3 D-PHY Errors 3 Force
Bit 18 – DPHY_ERRORS_2 D-PHY Errors 2 Force
Bit 17 – DPHY_ERRORS_1 D-PHY Errors 1 Force
Bit 16 – DPHY_ERRORS_0 D-PHY Errors 0 Force
Bit 15 – ACK_WITH_ERR_15 Acknowledge With Error 15 Force
Bit 14 – ACK_WITH_ERR_14 Acknowledge With Error 14 Force
Bit 13 – ACK_WITH_ERR_13 Acknowledge With Error 13 Force
Bit 12 – ACK_WITH_ERR_12 Acknowledge With Error 12 Force
Bit 11 – ACK_WITH_ERR_11 Acknowledge With Error 11 Force
Bit 10 – ACK_WITH_ERR_10 Acknowledge With Error 10 Force
Bit 9 – ACK_WITH_ERR_9 Acknowledge With Error 9 Force
Bit 8 – ACK_WITH_ERR_8 Acknowledge With Error 8 Force
Bit 7 – ACK_WITH_ERR_7 Acknowledge With Error 7 Force
Bit 6 – ACK_WITH_ERR_6 Acknowledge With Error 6 Force
Bit 5 – ACK_WITH_ERR_5 Acknowledge With Error 5 Force
Bit 4 – ACK_WITH_ERR_4 Acknowledge With Error 4 Force
Bit 3 – ACK_WITH_ERR_3 Acknowledge With Error 3 Force
Bit 2 – ACK_WITH_ERR_2 Acknowledge With Error 2 Force
Bit 1 – ACK_WITH_ERR_1 Acknowledge With Error 1 Force
Bit 0 – ACK_WITH_ERR_0 Acknowledge With Error 0 Force