5.5.44 DSI Interrupt Mask Configuration Register 0

The following configuration values are valid for all listed bit names of this register:

0: The corresponding interrupt source is masked.

1: The corresponding interrupt source is activated.

Name: DSI_INT_MSK0
Offset: 0xC4
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
    DPHY_ERRORS_4DPHY_ERRORS_3DPHY_ERRORS_2DPHY_ERRORS_1DPHY_ERRORS_0 
Access R/WR/WR/WR/WR/W 
Reset 00000 
Bit 15141312111098 
 ACK_WITH_ERR_15ACK_WITH_ERR_14ACK_WITH_ERR_13ACK_WITH_ERR_12ACK_WITH_ERR_11ACK_WITH_ERR_10ACK_WITH_ERR_9ACK_WITH_ERR_8 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 ACK_WITH_ERR_7ACK_WITH_ERR_6ACK_WITH_ERR_5ACK_WITH_ERR_4ACK_WITH_ERR_3ACK_WITH_ERR_2ACK_WITH_ERR_1ACK_WITH_ERR_0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 20 – DPHY_ERRORS_4 D-PHY Errors Lane 4 Mask

Bit 19 – DPHY_ERRORS_3 D-PHY Errors Lane 3 Mask

Bit 18 – DPHY_ERRORS_2 D-PHY Errors Lane 2 Mask

Bit 17 – DPHY_ERRORS_1 D-PHY Errors Lane 1 Mask

Bit 16 – DPHY_ERRORS_0 D-PHY Errors Lane 0 Mask

Bit 15 – ACK_WITH_ERR_15 Acknowledge With Error 15 Mask

Bit 14 – ACK_WITH_ERR_14 Acknowledge With Error 14 Mask

Bit 13 – ACK_WITH_ERR_13 Acknowledge With Error 13 Mask

Bit 12 – ACK_WITH_ERR_12 Acknowledge With Error 12 Mask

Bit 11 – ACK_WITH_ERR_11 Acknowledge With Error 11 Mask

Bit 10 – ACK_WITH_ERR_10 Acknowledge With Error 10 Mask

Bit 9 – ACK_WITH_ERR_9 Acknowledge With Error 9 Mask

Bit 8 – ACK_WITH_ERR_8 Acknowledge With Error 8 Mask

Bit 7 – ACK_WITH_ERR_7 Acknowledge With Error 7 Mask

Bit 6 – ACK_WITH_ERR_6 Acknowledge With Error 6 Mask

Bit 5 – ACK_WITH_ERR_5 Acknowledge With Error 5 Mask

Bit 4 – ACK_WITH_ERR_4 Acknowledge With Error 4 Mask

Bit 3 – ACK_WITH_ERR_3 Acknowledge With Error 3 Mask

Bit 2 – ACK_WITH_ERR_2 Acknowledge With Error 2 Mask

Bit 1 – ACK_WITH_ERR_1 Acknowledge With Error 1 Mask

Bit 0 – ACK_WITH_ERR_0 Acknowledge With Error 0 Mask