10.1.2.1 Adder Functionality
The following table lists the functionality description of an adder.
| DataA | DataB | Sum | CoutA |
|---|---|---|---|
| m[width-1 : 0] | n[width-1 : 0] | (m + n + Cin )[width-1 : 0] | (m + n + Cin)[width] |
The Sklansky adder enables you to clear the Automatic Max. Fanout check box and specify a value for max fanout. This makes the software perform logic replication on high-fanout nets, so that the maximum fanout for all the nets in the design is not more than the value specified. If it is set to automatic, the software automatically makes the decision for logic replication based on the size of the design.
The MAXFANOUT parameter enables you to perform logic replication for all Flash adders, Subtractors, Adder/Subtractors and Accumulators. Inherently, only the Sklansky algorithm generates high-fanout nets (max. fanout = WIDTH/2), so you see effects only for this algorithm. The area increases exponentially for MAXFANOUT approaching two and it flattens out for higher values, as shown in the following figure.
Performance is not always as predictable (as shown in the following figure). When you select automatic logic replication, the software automatically chooses a value for MAXFANOUT based on WIDTH. This value returns a good, but not necessarily the best, result for that particular value of WIDTH.
