8.2.2.38 Output Enable for PORTD Register

Name: TRISD
Offset: 0xE56

Bit 15141312111098 
 TRISD[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 TRISD[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000001 

Bits 15:0 – TRISD[15:0] Output Enable for PORTD bits

ValueDescription
1

LATx[n] is not driven on the PORTx[n] pin.

0

LATx[n] is driven on the PORTx[n] pin.