8.2.2.2 Output Enable for PORTA Register
| Name: | TRISA |
| Offset: | 0xE02 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TRISA[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 1 | ||||
Bits 4:0 – TRISA[4:0] Output Enable for PORTx bits
| Value | Description |
|---|---|
1 |
LATx[n] is not driven on the PORTx[n] pin. |
0 |
LATx[n] is driven on the PORTx[n] pin. |