8.2.2.33 Interrupt Change Notification Enable for PORTC Register
| Name: | CNEN0C |
| Offset: | 0xE48 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CNEN0C[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CNEN0C[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – CNEN0C[15:0] Interrupt Change Notification Enable for PORTC bits
| Value | Description |
|---|---|
1 |
Interrupt-on-change (from the last read value) is enabled for PORTx[n]. |
0 |
Interrupt-on-change is disabled for PORTx[n]. |