8.7.73 Interrupt Control Register 1
| Name: | INTCON1 |
| Offset: | 0x8C0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| NSTDIS | OVAERR | OVBERR | COVAERR | COVBERR | OVATE | OVBTE | COVTE | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SFTACERR | DIV0ERR | MATHERR | ADDRERR | STKERR | OSCFAIL | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – NSTDIS Interrupt Nesting Disable bit
| Value | Description |
|---|---|
1 |
Interrupt nesting is disabled |
0 |
Interrupt nesting is enabled |
Bit 14 – OVAERR Accumulator A Overflow Trap Flag bit
| Value | Description |
|---|---|
1 |
Trap was caused by overflow of Accumulator A |
0 |
Trap was not caused by overflow of Accumulator A |
Bit 13 – OVBERR Accumulator B Overflow Trap Flag bit
| Value | Description |
|---|---|
1 |
Trap was caused by overflow of Accumulator B |
0 |
Trap was not caused by overflow of Accumulator B |
Bit 12 – COVAERR Accumulator A Catastrophic Overflow Trap Flag bit
| Value | Description |
|---|---|
1 |
Trap was caused by catastrophic overflow of Accumulator A |
0 |
Trap was not caused by catastrophic overflow of Accumulator A |
Bit 11 – COVBERR Accumulator B Catastrophic Overflow Trap Flag bit
| Value | Description |
|---|---|
1 |
Trap was caused by catastrophic overflow of Accumulator B |
0 |
Trap was not caused by catastrophic overflow of Accumulator B |
Bit 10 – OVATE Accumulator A Overflow Trap Enable bit
| Value | Description |
|---|---|
1 |
Trap overflow of Accumulator A |
0 |
Trap is disabled |
Bit 9 – OVBTE Accumulator B Overflow Trap Enable bit
| Value | Description |
|---|---|
1 |
Trap overflow of Accumulator B |
0 |
Trap is disabled |
Bit 8 – COVTE Catastrophic Overflow Trap Enable bit
| Value | Description |
|---|---|
1 |
Trap on catastrophic overflow of Accumulator A or B is enabled |
0 |
Trap is disabled |
Bit 7 – SFTACERR Shift Accumulator Error Status bit
| Value | Description |
|---|---|
1 |
Math error trap was caused by an invalid accumulator shift |
0 |
Math error trap was not caused by an invalid accumulator shift |
Bit 6 – DIV0ERR Divide-by-Zero Error Status bit
| Value | Description |
|---|---|
1 |
Math error trap was caused by a divide-by-zero |
0 |
Math error trap was not caused by a divide-by-zero |
Bit 4 – MATHERR Math Error Status bit
| Value | Description |
|---|---|
1 |
Math error trap has occurred |
0 |
Math error trap has not occurred |
Bit 3 – ADDRERR Address Error Trap Status bit
| Value | Description |
|---|---|
1 |
Address error trap has occurred |
0 |
Address error trap has not occurred |
Bit 2 – STKERR Stack Error Trap Status bit
| Value | Description |
|---|---|
1 |
Stack error trap has occurred |
0 |
Stack error trap has not occurred |
Bit 1 – OSCFAIL Oscillator Failure Trap Status bit
| Value | Description |
|---|---|
1 |
Oscillator failure trap has occurred |
0 |
Oscillator failure trap has not occurred |