8.7.41 Interrupt Priority Register 14
| Name: | IPC14 |
| Offset: | 0x85C |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SPI3RXIP[2:0] | U3TXIP[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 1 | 0 | 0 | 1 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| U3RXIP[2:0] | U3EIP[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 1 | 0 | 0 | 1 | 0 | 0 | |||
Bits 14:12 – SPI3RXIP[2:0] SPI3 Receiver Interrupt Priority bits
| Value | Description |
|---|---|
| 7 | Interrupt Priority Level 7 (highest) |
| 6 | Interrupt Priority Level 6 |
| 5 | Interrupt Priority Level 5 |
| 4 | Interrupt Priority Level 4 (default) |
| 3 | Interrupt Priority Level 3 |
| 2 | Interrupt Priority Level 2 |
| 1 | Interrupt Priority Level 1 |
| 0 | Interrupt Priority Level 0 (lowest) |
Bits 10:8 – U3TXIP[2:0] UART3 Transmitter Priority bits
| Value | Description |
|---|---|
| 7 | Interrupt Priority Level 7 (highest) |
| 6 | Interrupt Priority Level 6 |
| 5 | Interrupt Priority Level 5 |
| 4 | Interrupt Priority Level 4 (default) |
| 3 | Interrupt Priority Level 3 |
| 2 | Interrupt Priority Level 2 |
| 1 | Interrupt Priority Level 1 |
| 0 | Interrupt Priority Level 0 (lowest) |
Bits 6:4 – U3RXIP[2:0] UART3 Receiver Priority bits
| Value | Description |
|---|---|
| 7 | Interrupt Priority Level 7 (highest) |
| 6 | Interrupt Priority Level 6 |
| 5 | Interrupt Priority Level 5 |
| 4 | Interrupt Priority Level 4 (default) |
| 3 | Interrupt Priority Level 3 |
| 2 | Interrupt Priority Level 2 |
| 1 | Interrupt Priority Level 1 |
| 0 | Interrupt Priority Level 0 (lowest) |
Bits 2:0 – U3EIP[2:0] UART3 External Interrupt Priority bits
| Value | Description |
|---|---|
| 7 | Interrupt Priority Level 7 (highest) |
| 6 | Interrupt Priority Level 6 |
| 5 | Interrupt Priority Level 5 |
| 4 | Interrupt Priority Level 4 (default) |
| 3 | Interrupt Priority Level 3 |
| 2 | Interrupt Priority Level 2 |
| 1 | Interrupt Priority Level 1 |
| 0 | Interrupt Priority Level 0 (lowest) |