8.7.4 Interrupt Request Flags Register 3
| Name: | IFS3 |
| Offset: | 0x806 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PTGSTEPIF | JTAGIF | ICDIF | SPI3TXIF | SPI3RXIF | U3TXIF | U3RXIF | U3EIF | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| QEI2IF | C2TXIF | C1TXIF | CRCIF | U2EIF | U1EIF | QEI1IF | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – PTGSTEPIF PTG Step Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 14 – JTAGIF JTAG Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 13 – ICDIF In-Circuit Debugger Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 12 – SPI3TXIF SPI3 Transmit Done Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 11 – SPI3RXIF SPI3 Receive Done Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 10 – U3TXIF UART3 Transmitter Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 9 – U3RXIF UART3 Receiver Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 8 – U3EIF UART3 Error Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 6 – QEI2IF QEI2 Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 5 – C2TXIF CAN2 TX Data Request Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 4 – C1TXIF CAN1 TX Data Request Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 3 – CRCIF Cyclic Redundancy Check Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 2 – U2EIF UART2 Error Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 1 – U1EIF UART1 Error Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |
Bit 0 – QEI1IF QEI1 Interrupt bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred |
0 |
Interrupt has not occurred |