8.7.74 Interrupt Control Register 2
| Name: | INTCON2 |
| Offset: | 0x8C2 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| GIE | DISI | SWTRAP | AIVTEN | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INT3EP | INT2EP | INT1EP | INT0EP | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 15 – GIE Global Interrupt Enable bit
| Value | Description |
|---|---|
1 |
Interrupts and associated IE bits are enabled |
0 |
Interrupts are disabled, but traps are still enabled |
Bit 14 – DISI
DISI Instruction Status bit
| Value | Description |
|---|---|
1 |
|
0 |
|
Bit 13 – SWTRAP Software Trap Status bit
| Value | Description |
|---|---|
1 |
Software trap is enabled |
0 |
Software trap is disabled |
Bit 8 – AIVTEN Alternate Interrupt Vector Table Enable bit
| Value | Description |
|---|---|
1 |
Alternate Interrupt Vector Table enabled (AIVTDIS = |
0 |
Alternate Interrupt Vector Table disabled |
Bit 3 – INT3EP External Interrupt 3 Edge Detect Polarity Select bit
| Value | Description |
|---|---|
1 |
Interrupt on negative edge |
0 |
Interrupt on positive edge |
Bit 2 – INT2EP External Interrupt 2 Edge Detect Polarity Select bit
| Value | Description |
|---|---|
1 |
Interrupt on negative edge |
0 |
Interrupt on positive edge |
Bit 1 – INT1EP External Interrupt 1 Edge Detect Polarity Select bit
| Value | Description |
|---|---|
1 |
Interrupt on negative edge |
0 |
Interrupt on positive edge |
Bit 0 – INT0EP External Interrupt 0 Edge Detect Polarity Select bit
| Value | Description |
|---|---|
1 |
Interrupt on negative edge |
0 |
Interrupt on positive edge |