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43.8.17
Table 43-18. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: CryptoMaster_DMA_Registers__INT_STATCLR Offset: 0x10030 Reset: 0x00000000 Property: W
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 Access Reset
Bit 15 14 13 12 11 10 9 8 Access Reset
Bit 7 6 5 4 3 2 1 0 INT_STATCLR[5:0] Access W W W W W W Reset 0 0 0 0 0 0
Bits 5:0 – INT_STATCLR[5:0]
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