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43.8.36 Test data register.
Table 43-37. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: RNG_Control_Registers__TestData Offset: 0x11020 Reset: 0x00000000 Property: W
Bit 31 30 29 28 27 26 25 24 TestData[31:24] Access W W W W W W W W Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 TestData[23:16] Access W W W W W W W W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 TestData[15:8] Access W W W W W W W W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 TestData[7:0] Access W W W W W W W W Reset 0 0 0 0 0 0 0 0
Bits 31:0 – TestData[31:0] Test data register.
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