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43.8.20
Table 43-21. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: CryptoMaster_DMA_Registers__STATUS Offset: 0x1003C Reset: 0x00000000 Property: R
Bit 31 30 29 28 27 26 25 24 PUSH_NBDATA[15:8] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 PUSH_NBDATA[7:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 Access Reset
Bit 7 6 5 4 3 2 1 0 SOFT_RST_BUSY PUSH_WAITINGFIFO FETCH_NOT_EMPTY PUSH_BUSY FETCH_BUSY Access R R R R R Reset 0 0 0 0 0
Bits 31:16 – PUSH_NBDATA[15:0]
Bit 6 – SOFT_RST_BUSY
Bit 5 – PUSH_WAITINGFIFO
Bit 4 – FETCH_NOT_EMPTY
Bit 1 – PUSH_BUSY
Bit 0 – FETCH_BUSY
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