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43.8.46 AIS31 configuration register 1.
Table 43-47. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: RNG_Control_Registers__AIS31Conf1 Offset: 0x1104C Reset: 0x00000000 Property: RW
Bit 31 30 29 28 27 26 25 24 HExpectedValue[15:8] Access RW RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 HExpectedValue[7:0] Access RW RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 OnlineRepThreshold[15:8] Access RW RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 OnlineRepThreshold[7:0] Access RW RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0 0
Bits 31:16 – HExpectedValue[15:0] Expected history value.
Bits 15:0 – OnlineRepThreshold[15:0] Online repeat threshold.
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