Jump to main content
43.8.49 Hardware configuration register.
Table 43-50. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: RNG_Control_Registers__HwConfig Offset: 0x11058 Reset: 0x00000037 Property: R
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 Access Reset
Bit 15 14 13 12 11 10 9 8 AIS31Full AIS31 Access R R Reset 0 0
Bit 7 6 5 4 3 2 1 0 NumbOfRings[7:0] Access R R R R R R R R Reset 0 0 1 1 0 1 1 1
Bit 9 – AIS31Full Generic g_AIS31Full value.
Bit 8 – AIS31 Generic g_AIS31 value.
Bits 7:0 – NumbOfRings[7:0] Generic g_NumRings value.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
