12.4.7 Multi-Mode Interrupt Enable Register (IEM)
| Bit Number | Name | R/W | Reset Value | Description |
|---|---|---|---|---|
| [7:5] | Reserved | R/W | 0 | Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. |
| 4 | ELINSI | R/W | 0 | Enables the LIN sync detection interrupt 0: Disabled (default) 1: Enabled |
| 3 | ELINBI | R/W | 0 | Enables LIN break interrupt 0: Disabled (default) 1: Enabled |
| 2 | EPID_PEI | R/W | 0 | Enables PID parity error interrupt 0: Disabled (default) 1: Enabled |
| 1 | ENACKI | R/W | 0 | Enables NACK interrupt 0: Disabled (default) 1: Enabled |
| 0 | ERTOI | R/W | 0 | Enables receiver timeout interrupt 0: Disabled (default) 1: Enabled |