12.4.21 Address Register (ADR)
| Bit Number | Name | R/W | Reset Value | Description |
|---|---|---|---|---|
| [7:0] | ADR | R/W | 0 | The address register is used in 9-bit Address Flag mode. When an address flag is received on the 9th bit, and EAFM is set in Table 12-24, the incoming data is checked against the address register. If a match occurs, the Rx FIFO is enabled. |