10.1.9.1.8 Modulo Counter

As counter size increases, the amount and complexity of support logic also increases. LFSR base counters achieve high performance using very few logic resources. The Modulo Counter is designed to provide two logic levels independently of the chosen modulo value. The architecture borrows some look-ahead techniques previously used in the register look-ahead counter.

The following example is based on a modulo-6 counter with the these characteristics:

  • Active-HIGH clock edge
  • Active-LOW asynchronous clear
  • Active-HIGH synchronous clear
  • No Enable
Figure 10-12. Modulo Counter Behavior
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