57.31 GMAC Electrical Specifications
AC CHARACTERISTICS | Standard
Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||||
---|---|---|---|---|---|---|---|
Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions |
MII Output TIMING Requirements | |||||||
ET_1 | tMDIOSU | MDIO Set-up Time | 10 | — | — | ns | VDDIO = 3.3V with CLOAD = 20 pF |
ET_3 | tMDIOHOLD | MDIO Hold Time | 10 | — | — | ns | |
ET_5 | tMDIOVAL | MDIO OUTPUT Valid Time | 0 | — | 10 | ns | |
MII RX TIMING Requirements | |||||||
ET_7 | tRXCLK | RXCLK Period | — | Note 1 | — | ns | VDDIO = 3.3V with CLOAD = 20 pF |
ET_9 | tRXCLKH | RXCLK High Time | tRXCLK / 2 | — | — | ns | |
ET_11 | tRXCLKL | RXCLK Low Time | tRXCLK / 2 | — | — | ns | |
ET_13 | tRXSU tRXERSU tRXDVSU | ERX[3:0], ERXER and ERXDV Set-up Time | 10 | — | — | ns | |
ET_15 | tRXHOLD tRXERHOLD tRXDVHOLD | ERX[3:0], ERXER and ERXDV Hold Time | 10 | — | — | ns | |
MII TX TIMING Requirements | |||||||
ET_17 | tTXCLK | TXCLK Period | — | Note 1 | — | ns | VDDIO = 3.3V with CLOAD = 20 pF |
ET_19 | tTXCLKH | TXCLK High Time | tTXCLK / 2 | — | — | ns | |
ET_21 | tTXCLKL | TXCLK Low Time | tTXCLK / 2 | — | — | ns | |
ET_23 | tTXCOLSU
tTXCRSSU | TXCOL and TXCRS Set-up Time | 10 | — | — | ns | |
ET_25 | tTXCOLHOLD
tTXCRSHOLD | TXCOL and TXCRS Hold Time | 10 | — | — | ns | |
ET_27 | tTX[3:0]VAL
tTXERVAL tTXENVAL | TX[3:0], TXER and TXEN valid times | 3 | — | 25 | ns | — |
Note:
|
AC CHARACTERISTICS | Standard
Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | ||||||
---|---|---|---|---|---|---|---|
Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions |
RMII TIMING Requirements | |||||||
ET_29 | tREFCLK | Reference Clock Frequency | — | (Note 1) | — | MHz | VDDIO = 3.3V with CLOAD = 20 pF |
ET_31 | tREFCLKIH | Reference Clock High Time | — | tREFCLK / 2 | — | ns | |
ET_33 | tREFCLKIL | Reference Clock Low Time | — | tREFCLK / 2 | — | ns | |
ET_35 | REFCLKDC | Reference Clock Duty Cycle | — | 50 | — | % | |
ET_41 | tRX[1:0]SU
tRXERSU tCRSDVSU | RXD[1:0], RXER, CRSDV Set-up time | 4 | — | — | ns | |
ET_43 | tRX[1:0]HOLD
tRXERHOLD tCRSDVHOLD | RXD[1:0], RXER,CRSDV hold time | 2 | — | — | ns | |
ET_45 | tTX[1:0]VAL
tTXENVAL | TX[1:0], TXEN valid time | 2 | — | 16 | ns |