57.2 Operation Frequency and Thermal Specifications

Table 57-2. Operating Frequency versus Voltage
Param. No.VDDIO, AVDD RangeVDDCORE RangeTemp. Range (in °C)Max MCU FrequencyComments
DC_5a2.5 to 3.6V1.08 to 1.2V-40°C to +85°C266 MHzIndustrial
DC_5b2.5 to 3.6V1.2 to 1.32V-40°C to +85°C300 MHz
Table 57-3. MCU Thermal Operating Conditions
RatingSymbolMin.Typ.Max.Unit
Industrial Temperature Devices Operating Ambient Temperature Range Operating Junction Temperature Range

TA

TJ

-40

—

—

85

105

°C

Internal Chip Power Dissipation:

  • Single supply mode:

    (VDDIN x IDDOUT) + (VDDIO x (IDDIO –∑ IOHVDDIOx)) + (VDDPLL x IDDPLL) + (VDDPLLUSB x IDDUSB) + (VDDUTMII x IDDUTMII)

  • Dual supply mode:

    (VDDIN x IDDOUT) + (VDDCORE x IVDDCORE) + (VDDIO x (IDDIO –∑ IOHVDDIOx)) + (VDDPLL x IDDPLL) + (VDDPLLUSB x IDDUSB) + (VDDUTMII x IDDUTMII) + (VDDUTMIC x IDDUTMIC)

I/O Pin Power Dissipation:

PI/O = ∑ ((VDDIO – VOHVDDIOx) x IOHVDDIOx) + ∑ (VOL x IOLVDDIOx)

PDPINT + PI/OW
Maximum Allowed Power DissipationPDMAX(TJ – TA)/θJAW
Table 57-4. Thermal Packaging Characteristics (1)
CharacteristicsSymbolTyp.Max.Unit
Thermal Resistance, 144-pin TFBGA (10x10x1.2 mm) PackageθJA24.282—°C/W
Thermal Resistance, 144-pin TQFP with exposed pad (20x20x1.0 mm) PackageθJA16.604—°C/W
Thermal Resistance, 144-pin TQFP (20x20x1.0 mm) PackageθJA45.758—°C/W
Thermal Resistance, 100-pin TFBGA (9x9x1.2 mm) PackageθJA24.778—°C/W
Thermal Resistance, 100-pin TQFP with exposed pad (14x14x1.0 mm) PackageθJA16.604—°C/W
Thermal Resistance, 100-pin TQFP (10x10x1.0 mm) PackageθJA38.738—°C/W
Thermal Resistance, 64-pin TQFP with exposed pad (10x10x1.0 mm) PackageθJA19.774—°C/W
Note:
  1. Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.