57.17 PLL Electrical Specifications

Table 57-19. Phase Locked Loop (PLLA) Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDDIN = 2.5V to 3.6V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.Units PLLA 500 MHz (Phase Locked Loop)
PLLA 500 MHz (Phase Locked Loop)
PLLA_1PLLA_FINPLLA Input Frequency Range8—FCLK_11MHz—
PLLA_3PLLA_FOUTPLLA Output Clock Frequency160—500MHz—
PLLA_11PLLA_SRT(1)PLLA Start-Up Time—300µsVDDIN = 3.3V,

PLLA_FIN = 12 MHz @ ≤ 100 ppm

Note:
  1. PLLA_FIN is XOSC.
Table 57-20. UTMI PLL (UPLL) Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDDPLLUSB = 3.0V to 3.6V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
USB UTMI Digital Phase Locked Loop (UTMI PLLMHz)
UPLL_1UPLL_FINUPLL Input Frequency Range—12 or 16—MHzUTMI_CKTRIM.FREQ[0] = 0 or 1
UPLL_3UPLL_FOUTUPLL Output Clock Frequency—480—MHzUSB_24: Refer to the USB Electrical Specifications
UPLL_7tUPLL_SRTUPLL Startup Time——50μs—