57.22 USART Electrical Specifications

Table 57-31. USART Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
UT_1FBRATEBaud RateAsynchronous

16x over-sampling mode

(US_MR.OVER = 0x0)

FCLK_3/16MbpsVDDIO = 3.3V, CLOAD = 30 pF
UT_3Asynchronous

8x over-sampling mode

(US_MR.OVER = 0x1)

FCLK_3/8MbpsVDDIO = 3.3V, CLOAD = 30 pF
UT_19Synchronous Host Mode

(Internal clock)

25MbpsVDDIO = 3.3V, CLOAD = 30 pF
UT_21Synchronous Client Mode

(External clock)

25MbpsVDDIO = 3.3V, CLOAD = 30 pF
UT_25FXCKUSART External Clock 25MHz-
Note:
  1. These parameters are characterized, but not tested in manufacturing.
Figure 57-21. USART SPIx Host Mode (CPOL = 0) and (CPOL = 1) Timing Diagrams
Figure 57-22. USART SPIx Client Mode (Mode 1 or 2) Timing Diagrams
Figure 57-23. USART SPIx Client Mode (Mode 0 or 3) Timing Diagrams
Table 57-32. USART in SPI Mode Electrical Specifications(1)
AC CHARACTERISTICSStandard Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
Host Mode
SPI_0THSCKSCK PeriodFLCK_3/6nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_1THISUInput Data Setup Time1.645nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_2THIHUInput Data Hold Time0.396nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_3THSSSChip Select Active to Serial Clock-0.795nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_4THOSUOutput Data Setup Time-0.9268.985nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_5THSSISerial Clock to Chip Select Inactive-1.9354.502nsVDDIO = 3.3V, CLOAD = 30 pF
Client Mode
SPI_6TCSCKFSCK falling to MISO3.69413.098nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_7TCSURMOSI Setup time before SCK rises1.311nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_8TCHURMOSI Hold time after SCK rises0.497nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_9TCSCMISOSCK rising to MISO3.77813.118nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_10TCSUFMOSI Setup time before SCK falls1.438nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_11TCHUFMOSI Hold time after SCK falls0.476nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_12TCNSSRNPCS0 Setup to SCK rising0.332nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_13TCNSHFNPCS0 Hold after SCK falling0.837nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_14TCNSSFNPCS0 Setup to SCK falling0.389nsVDDIO = 3.3V, CLOAD = 30 pF
SPI_15TCNSHRNPCS0 Hold after SCK rising0.889nsVDDIO = 3.3V, CLOAD = 30 pF
Note:
  1. These parameters are characterized, but not tested in manufacturing.