57.24 I²C Electrical Specifications

Figure 57-26. I²C Start/Stop Bits Host Mode Timing Diagrams

Figure 57-27. I²C Bus Data Host Mode Timing Diagrams

Table 57-35. I²C Host Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾		Min.	Max.	Units	Conditions
I2CM_1	TL0:TWCK	Host Clock Low Time	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_3	THI:TWCK	Host Clock High Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	60	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_5	TF:TWCK	TWDx and TWCKx Fall Time	100 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_7	TR:TWCK	TWDx and TWCKx Rise Time	100 kHz mode	—	1000	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	100	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	50	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	10	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_11	THD:DAT	Data Hold Time ⁽¹⁾	100 kHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	5	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_15	THD:STA	Start Condition Hold Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_17	TSU:ST0	Stop Condition Setup Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_21	TAA:TWCK	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	0.9	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	0.45	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	100	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_23	TBF:TWD	Bus Free Time ⁽²⁾	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CM_25	Ci	Capacitance for each I/O Pin		—	10	pF	Required only for Clock Frequency > 100 kHz
Note: If High-Speed mode is selected, TWD is internally modified on the TWCK falling edge to meet the I²C specified maximum hold time, else if High-Speed mode is not configured TWD is kept unchanged after TWCK falling edge for a period of (HOLD + 3) × t peripheral clock. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

Figure 57-28. I²C Start/Stop Bits Client Mode Timing Diagrams

Figure 57-29. I²C Bus Data Client Mode Timing Diagrams

Table 57-36. I²C Client Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDDIO = VDDIN 2.5V to 3.6V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾		Min.	Max.	Units	Conditions
I2CS_1	TL0:SCL	Client Clock Low Time	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_3	THI:SCL	Client Clock High Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	60	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_5	TF:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_7	TR:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	300	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	120	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	40	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	100	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	50	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	10	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_11	THD:DAT	Data Hold Time ⁽¹⁾	100 kHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	300	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	5	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_15	THD:STA	Start Condition Hold Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_17	TSU:ST0	Stop Condition Setup Time	100 kHz mode	4	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_21	TAA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	—	0.9	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	—	0.45	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	—	100	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
I2CS_23	TBF:SDA	Bus Free Time ⁽¹⁾	100 kHz mode	4.7	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			400 kHz mode	1.3	—	µs	VDDIO = 3.3V, IPULL-UP = 3 mA, CLOAD = 400 pF
			1 MHz mode	0.5	—	µs	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 550 pF
			3.4 MHz mode	160	—	ns	VDDIO = 3.3V, IPULL-UP = 20 mA, CLOAD = 100 pF
Note: If High-Speed mode is selected, TWD is internally modified on the TWCK falling edge to meet the I²C specified maximum hold time, else if High-Speed mode is not configured TWD is kept unchanged after TWCK falling edge for a period of (HOLD + 3) × t peripheral clock. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

PIC32CZ CA70/MC70

57.24 I2C Electrical Specifications

57.24 I²C Electrical Specifications