13.4.55 Interrupt Priority Register 28

Table 13-56. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: IPC28
Offset: 0x148

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
  AD2CMP19IP[2:0] AD2CH19IP[2:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 100100 
Bit 76543210 
  AD2CMP18IP[2:0] AD2CH18IP[2:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 100100 

Bits 14:12 – AD2CMP19IP[2:0] ADC 2 Digital Comparator 19 Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2 Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 10:8 – AD2CH19IP[2:0] ADC 2 Channel 19 Conversion Ready Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2 Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 6:4 – AD2CMP18IP[2:0] ADC 2 Digital Comparator 14 Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2 Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 2:0 – AD2CH18IP[2:0] ADC 2 Channel 18 Conversion Ready Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2 Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)