13.4.4 Interrupt Control Register 4
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Gray cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| C | Write to clear | S | Software settable bit | x | Channel number |
| Name: | INTCON4 |
| Offset: | 0x7C |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| OVATE | OVBTE | COVTE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OVAERR | OVBERR | COVAERR | COVBERR | SFTACERR | DIV0ERR | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 21 – OVATE Accumulator A Overflow Trap Enable bit
| Value | Description |
|---|---|
1 | Enable Accumulator A overflow trap (OVAERR) |
0 | Trap is disabled |
Bit 20 – OVBTE Accumulator B Overflow Trap Enable bit
| Value | Description |
|---|---|
1 | Enable Accumulator B overflow trap (OVBERR) |
0 | Trap is disabled |
Bit 19 – COVTE Catastrophic Overflow A/B Trap Enable bit
| Value | Description |
|---|---|
1 | Enable trap on catastrophic overflow of Accumulator A/B (COVAERR/COVBERR) |
0 | Trap is disabled |
Bit 5 – OVAERR Accumulator A Overflow Trap Flag bit
| Value | Description |
|---|---|
1 | Trap was caused by overflow of Accumulator A |
0 | Trap was not caused by overflow of Accumulator A |
Bit 4 – OVBERR Accumulator B Overflow Trap Flag bit
| Value | Description |
|---|---|
1 | Trap was caused by overflow of Accumulator B |
0 | Trap was not caused by overflow of Accumulator B |
Bit 3 – COVAERR Accumulator A Catastrophic Overflow Trap Flag bit
| Value | Description |
|---|---|
1 | Trap was caused by catastrophic overflow of Accumulator A |
0 | Trap was not caused by catastrophic overflow of Accumulator A |
Bit 2 – COVBERR Accumulator B Catastrophic Overflow Trap Flag bit
| Value | Description |
|---|---|
1 | Trap was caused by catastrophic overflow of Accumulator B |
0 | Trap was not caused by catastrophic overflow of Accumulator B |
Bit 1 – SFTACERR Shift Accumulator Error Status bit
| Value | Description |
|---|---|
1 | Math error trap was caused by an invalid accumulator shift |
0 | Math error trap was not caused by an invalid accumulator shift |
Bit 0 – DIV0ERR Arithmetic Divide-By-Zero Error Status bit
| Value | Description |
|---|---|
1 | Math error trap occurred due to arithmetic divide by zero |
0 | Math error trap due to divide-by-zero has not occurred |