13.4.18 Interrupt Enable Register 0

Table 13-19. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Gray cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
C	Write to clear	S	Software settable bit	x	Channel number

Name:	IEC0
Offset:	0xB4


Bit	31	30	29	28	27	26	25	24
						WDTIE	C4MONIE	C4WARMIE
Access						R/W	R/W	R/W
Reset						0	0	0


Bit	23	22	21	20	19	18	17	16
	C4FAILIE	C3RDYIE	C3MONIE	C3WARMIE	C3FAILIE	C2RDYIE	C2MONIE	C2WARMIE
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
			C2FAILIE	C1WARMIE	C1FAILIE	CLKERRIE	CLKFAILIE
Access			R/W	R/W	R/W	R/W	R/W
Reset			0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	NVMCRCIE	NVMIE	NVMECCIE	PBERRIE		XRAMECCIE	CPUFPUIE
Access	R/W	R/W	R/W	R/W		R/W	R/W
Reset	0	0	0	0		0	0

Bit 26 – WDTIE Watchdog Timer Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 26 – C4RDYIE Clock 4 Ready Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 25 – C4MONIE Clock 4 Monitor Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 24 – C4WARMIE Clock 4 Warming Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 23 – C4FAILIE Clock 4 Failure Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 22 – C3RDYIE Clock 3 Ready Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 21 – C3MONIE Clock3 Monitor Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 20 – C3WARMIE Clock 3 Warming Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 19 – C3FAILIE Clock 3 Failure Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 18 – C2RDYIE Clock 2 Ready Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 17 – C2MONIE Clock 2 Monitor Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 16 – C2WARMIE Clock 2 Warming Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 13 – C2FAILIE Clock 2 Failure Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 13 – C1RDYIE Clock 1 Ready Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 13 – C1MONIE Clock 1 Monitor Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 12 – C1WARMIE Clock 1 Warming Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 11 – C1FAILIE Clock 1 Failure Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 10 – CLKERRIE Clock Error (Combined) Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 9 – CLKFAILIE Clock Failure (Combined) Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 7 – NVMCRCIE NVM CRC Operation Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 6 – NVMIE NVM Erase/Program Operation Complete Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 5 – NVMECCIE NVM ECC Single Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 4 – PBERRIE PBU Parity Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 2 – XRAMECCIE X RAM ECC Single Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 2 – YRAMECCIE Y RAM ECC Single Error Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

Bit 1 – CPUFPUIE CPU Floating Point Unit Interrupt Enable bit

Value	Description
`1`	Interrupt enabled
`0`	Interrupt not enabled

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