13.4.41 Interrupt Priority Register 14

Table 13-42. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: IPC14
Offset: 0x110

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
      CNDIP[2:0] 
Access R/WR/WR/W 
Reset 100 
Bit 15141312111098 
  CNCIP[2:0] CNBIP[2:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 100100 
Bit 76543210 
  CNAIP[2:0]     
Access R/WR/WR/W 
Reset 100 

Bits 18:16 – CNDIP[2:0] Change Notification D Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 14:12 – CNCIP[2:0] Change Notification C Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 10:8 – CNBIP[2:0] Change Notification B Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)

Bits 6:4 – CNAIP[2:0] Change Notification A Interrupt Priority bits

ValueDescription
7Interrupt Priority Level 7 (highest)
6Interrupt Priority Level 6
5Interrupt Priority Level 5
4Interrupt Priority Level 4 (default)
3Interrupt Priority Level 3
2Interrupt Priority Level 2
1Interrupt Priority Level 1
0Interrupt Priority Level 0 (lowest)