9.3.9.2 ULPI_CARKIT_CTRL_REG Bit Definitions

Table 9-65. ULPI_CARKIT_CTRL_REG (0x40043071)
Bit NumberNameReset ValueFunction
[7:6]ReservedNAReserved
5CarKitActiveEnd0Set by link when CarKitActive (bit 1 of this register) is cleared. This bit must be cleared by software. It signifies that the USB controller’s (synchronous) USB mode has been entered.
4RxCmdEvent0Set by link when a RxCmd has been latched. This bit must be cleared by software.
3CancelCarKit0Set by software to abort CarKit mode and wake up the PHY. This bit auto-clears when the PHY enters Synchronous mode.
2AltIntEvent0Set by link when an alt_int (ULPI_RAW_DATA_REG.bit7) event occurs. This bit must be cleared by software.
1CarKitActive0Set by link when the (asynchronous) CarKit mode is entered after DIR goes high. It is cleared on the falling edge of DIR.
0DisableUTMI0Set and cleared by software to decouple the reconstituted UTMI signals from the USB controller prior to entering CarKit mode.

It cannot be cleared while ULPICarKitControl CarKitActive bit (bit 1 of this register) is set.