9.3.9.2 ULPI_CARKIT_CTRL_REG Bit Definitions

Table 9-65. ULPI_CARKIT_CTRL_REG (0x40043071)
Bit Number Name Reset Value Function
[7:6] Reserved NA Reserved
5 CarKitActiveEnd 0 Set by link when CarKitActive (bit 1 of this register) is cleared. This bit must be cleared by software. It signifies that the USB controller’s (synchronous) USB mode has been entered.
4 RxCmdEvent 0 Set by link when a RxCmd has been latched. This bit must be cleared by software.
3 CancelCarKit 0 Set by software to abort CarKit mode and wake up the PHY. This bit auto-clears when the PHY enters Synchronous mode.
2 AltIntEvent 0 Set by link when an alt_int (ULPI_RAW_DATA_REG.bit7) event occurs. This bit must be cleared by software.
1 CarKitActive 0 Set by link when the (asynchronous) CarKit mode is entered after DIR goes high. It is cleared on the falling edge of DIR.
0 DisableUTMI 0 Set and cleared by software to decouple the reconstituted UTMI signals from the USB controller prior to entering CarKit mode.

It cannot be cleared while ULPICarKitControl CarKitActive bit (bit 1 of this register) is set.