9.3.9.8 ULPI_RAW_DATA_REG (Asynchronous Mode) Bit Definitions
When one of the PHY’s Asynchronous modes is selected, this register is used to indicate the present value of the ULPI bus, latched by any transition on int (on data(3)).
| Bit Number | Name | Reset Value | Function |
|---|---|---|---|
| [7:4] | Reserved | NA | — |
| 3 | data(3) | 0 | Active-high interrupt indication (int) |
| 2 | data(2) | 0 | Single-ended zero (se0) |
| 1 | data(1) | 0 | Differential data (dat) |
| 0 | data(0) | 0 | Active-high transmit enable (tx_enable) |