14.3.2 ADC Control Register 1 High
| Name: | ADCON1H |
| Offset: | 0xB02 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FORM | SHRRES[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 1 | 1 | ||||||
Bit 7 – FORM Fractional Data Output Format bit
| Value | Description |
|---|---|
1 |
Fractional |
0 |
Integer |
Bits 6:5 – SHRRES[1:0] Shared ADC Core Resolution Selection bits
| Value | Description |
|---|---|
11 |
12-bit resolution |
10 |
10-bit resolution |
01 |
8-bit resolution |
00 |
6-bit resolution |