14.3.19 ADC Comparator x Threshold Low Register
| Name: | ADCMPxLO |
| Offset: | 0xB3C, 0xB44, 0xB4C, 0xB54 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CMPLO[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPLO[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – CMPLO[15:0] ADC Comparator Lower Threshold bits
The register stores the 16-bit low digital comparison values for use by the digital comparators.