5.2.7.110 High-End Overlay Configuration Register 30
This register can only be written if HEWPCFGE is cleared in the LCDC Write Protection Mode Register.
| Name: | LCDC_HEOCFG30 |
| Offset: | 0x00000408 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| VXSCCFG1[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| VXSCBICU | VXSC1201N | VXSCTAP2 | VXSCCFG[1:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| VXSYCFG1[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| VXSYBICU | VXSY1201N | VXSYTAP2 | VXSYCFG[1:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 25:24 – VXSCCFG1[1:0] Vertical Scaler Chroma Configuration for Field 1(only used for YCrCb Interlaced Frame Content)
Filter taps shift for chroma components. The value is from 0 to 3 when VXSYTAP2 = 0 (4 coefficients used) and from 0 to 1 when when VXSYTAP2 = 1 (2 coefficients used).
Bit 22 – VXSCBICU Vertical Scaler Predefined Bicubic Taps Selected for Chroma/GB Component
| Value | Description |
|---|---|
| 0 |
Bicubic taps values are not selected. |
| 1 |
Bicubic taps values are selected. |
Bit 21 – VXSC1201N Vertical Scaler Bilinear 2 Taps Position among 4 Taps Filter for Chroma/GB Component
| Value | Description |
|---|---|
| 0 |
When selected, bilinear taps values are located on 0 and 1 positions (left aligned). |
| 1 |
When selected, bilinear taps values are located on 0 and 1 positions (center aligned). |
Bit 20 – VXSCTAP2 Vertical Scaler Predefined Bilinear 2 Taps Selected for Chroma/GB Component
| Value | Description |
|---|---|
| 0 |
Bilinear 2 taps value not selected. |
| 1 |
Bilinear 2 taps value selected. |
Bits 17:16 – VXSCCFG[1:0] Vertical Scaler Chroma/GB Configuration for Field 0 or Progressive Scan
Filter taps shift for chroma components. The value is from 0 to 3 when VXSYTAP2 = 0 (4 coefficients used) and from 0 to 1 when when VXSYTAP2 = 1 (2 coefficients used).
Bits 9:8 – VXSYCFG1[1:0] Vertical Scaler Chroma/GB Configuration for Field 1 (only used for interlaced frame content)
Filter taps shift for chroma components. The value is from 0 to 3 when VXSYTAP2 = 0 (4 coefficients used) and from 0 to 1 when when VXSYTAP2 = 1 (2 coefficients used).
Bit 6 – VXSYBICU Vertical Scaler Predefined Bicubic Taps Selected for Luma/AR Component
| Value | Description |
|---|---|
| 0 |
Bicubic taps values are not selected. |
| 1 |
Bicubic taps values are selected. |
Bit 5 – VXSY1201N Vertical Scaler Bilinear 2 Taps Position among 4 Filter Taps for Luma/AR Component
| Value | Description |
|---|---|
| 0 |
When selected, bilinear tap values are located on 0 and 1 positions (left-aligned). |
| 1 |
When selected, bilinear tap values are located on 0 and 1 positions (center-aligned). |
Bit 4 – VXSYTAP2 Vertical Scaler Predefined Bilinear 2 Taps Selected for Luma/AR Component
| Value | Description |
|---|---|
| 0 |
Bilinear 2 taps value not selected. |
| 1 |
Bilinear 2 taps value selected. |
Bits 1:0 – VXSYCFG[1:0] Vertical Scaler Luma/AR Configuration for Field 0 or Progressive Scan
Filter taps shift for luma component. The value is from 0 to 3 when VXSYTAP2=0 (4 coefficients used) and from 0 to 1 when VXSYTAP2=1 (2 coefficients used).
