5.2.7.67 Overlay 2 Configuration Register 9
This register can only be written if O2WPCFGE is cleared in the LCDC Write Protection Mode Register.
| Name: | LCDC_OVR2CFG9 |
| Offset: | 0x000002A0 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| A1[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| A0[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DFACTA[1:0] | DFACTC[2:0] | SFACTA[1:0] | SFACTC[2] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SFACTC[1:0] | DSTKEY | CRKEY | REP | DMA | |||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 31:24 – A1[7:0] Alpha 1 Value
Operand used in Alpha blending process depending on the factor value.
Bits 23:16 – A0[7:0] Alpha 0 Value
Operand used in Alpha blending process depending on the factor value.
Bits 15:14 – DFACTA[1:0] Destination Factor for the Blending Equation of the Alpha Component
| Value | Name | Description |
|---|---|---|
| 0 | ZERO | Sets the factor to 0.0. |
| 1 | ONE | Sets the factor to 1.0. |
| 2 | M_A0_MUL_AS | Computes A0 multiplied by source alpha, then sets the factor to one minus the result. |
| 3 | A1 | Sets the factor to A1/255. |
Bits 13:11 – DFACTC[2:0] Destination Factor for the Blending Equation of the Color Component
| Value | Name | Description |
|---|---|---|
| 0 | ZERO | Sets the factor to 0.0. |
| 1 | ONE | Sets the factor to 1.0. |
| 2 | A0 | Sets the factor to A0/255. |
| 3 | A1 | Sets the factor to A1/255. |
| 4 | A0_MULT_AD | Sets the factor to A0 multiplied by Destination Alpha. |
| 5 | M_A0_MULT_AD | Sets the factor to A0 multiplied by Destination Alpha, then set the factor one minus the result. |
| 6 | M_A0_MUL_AS | Computes A0 multiplied by source alpha0, then sets the factor to one minus the result. |
| 7 | M_A0 | Computes one minus A0, then sets the factor to one minus the result. |
Bits 10:9 – SFACTA[1:0] Source Factor for the Blending Equation of the Alpha Component
| Value | Name | Description |
|---|---|---|
| 0 | ZERO | Sets the factor to 0.0. |
| 1 | ONE | Sets the factor to 1.0. |
| 2 | A0 | Sets the factor to A0/255. |
| 3 | A1 | Sets the factor to A1/255. |
Bits 8:6 – SFACTC[2:0] Source Factor for the Blending Equation of the Color Component
| Value | Name | Description |
|---|---|---|
| 0 | ONE | Sets the factor to 1.0. |
| 1 | ZERO | Sets the factor to 0.0. |
| 2 | A0 | Sets the factor to A0/255. |
| 3 | A0_MULT_AD | Sets the factor to A0 multiplied by Destination Alpha. |
| 4 | A0_MUL_AS | Sets the factor to A0 multiplied by Source Alpha. |
| 5 | M_A0_MUL_AD | Computes A0 multiplied by Destination Alpha, then sets the factor to minus the result. |
Bit 3 – DSTKEY Destination Color Keying
| Value | Description |
|---|---|
| 0 | When CRKEY is enabled, color key is applied on OVR2 pixels, before the blending operation. |
| 1 | When CRKEY is enabled, color key is applied on OVR2 pixels, after the blending operation. |
Bit 2 – CRKEY Chroma Keying
Bit 1 – REP Replication Logic
In all ARGB formats with 1 transparency bit, REP configuration affects the A field interpretation when A=1. If REP=0, then A=1 will be interpreted as a Alpha = 0x80 (half transparent). If REP=1, then A=1 will be interpreted as a Alpha = 0xFF (full opaque).
| Value | Description |
|---|---|
| 0 | When the selected pixel depth is less than 24 bpp, the pixel is shifted and LSBs are set to 0. |
| 1 | When the selected pixel depth is less than 24 bpp, the pixel is shifted and the LSB replicates the MSB. |
Bit 0 – DMA DMA Enable
| Value | Description |
|---|---|
| 0 | The pixel for the current layer is retrieved from the default color register. |
| 1 | The pixel stream is retrieved from the memory. |