5.2.7.49 Overlay 1 Configuration Register 8
This register can only be written if O1WPCFGE is cleared in the LCDC Write Protection Mode Register.
Image components are MSB-aligned with their respective MASK field, so that if selected input mode involves components less than 8 bits, the LSBs of MASK fields are ignored.| Name: | LCDC_OVR1CFG8 |
| Offset: | 0x0000019C |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| RMASK[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| GMASK[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BMASK[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 23:16 – RMASK[7:0] Red Color Component Chroma Key Mask
Red mask used when the compare function is used. If a bit is set, then this bit is compared.
Bits 15:8 – GMASK[7:0] Green Color Component Chroma Key Mask
Green mask used when the compare function is used. If a bit is set, then this bit is compared.
Bits 7:0 – BMASK[7:0] Blue Color Component Chroma Key Mask
Blue mask used when the compare function is used. If a bit is set, then this bit is compared.