5.2.7.79 High-End Overlay Cr Plane Frame Buffer 1 Address Register

This register can only be written if HEWPCFGE is cleared in the LCDC Write Protection Mode Register.

Name: LCDC_HEOCRFBA1
Offset: 0x0000038C
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 CRFBA[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 CRFBA[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 CRFBA[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 CRFBA[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – CRFBA[31:0] Cr Plane Frame Buffer Address for Field 1 (used only for Interlaced frame content)