5.2.7.12 LCDC Interrupt Enable Register

This register can only be written if WPITE is cleared in the LCDC_WPMR.

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Enables the corresponding interrupt.

Name: LCDC_LCDIER
Offset: 0x0000002C
Reset: 
Property: Write-only

Bit 3130292827262524 
 WPIE        
Access W 
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
     HEOIEOVR2IEOVR1IEBASEIE 
Access WWWW 
Reset  
Bit 76543210 
    FIFOERRIEROWIEDISPIEDISIESOFIE 
Access WWWWW 
Reset  

Bit 31 – WPIE Write Protection Interrupt Enable

Bit 11 – HEOIE High-End Overlay Interrupt Enable

Bit 10 – OVR2IE Overlay 2 Interrupt Enable

Bit 9 – OVR1IE Overlay 1 Interrupt Enable

Bit 8 – BASEIE Base Layer Interrupt Enable

Bit 4 – FIFOERRIE Output FIFO Error Interrupt Enable

Bit 3 – ROWIE Row Interrupt Enable

Bit 2 – DISPIE Power-up/Power-down Sequence Terminated Interrupt Enable

Bit 1 – DISIE LCD Disable Interrupt Enable

Bit 0 – SOFIE Start of Frame Interrupt Enable