14.4.13 CAN Transmit Request Register
Note:
- The individual bytes in this
multibyte register can be accessed with the following register names:
- CxTXREQT: Accesses the top byte TXREQ[31:24].
- CxTXREQU: Accesses the upper byte TXREQ[23:16].
- CxTXREQ: Accesses the byte TXREQ[31:0].
- These bits are only valid if
the associated objects are configured as transmit objects (TXEN =
1). Otherwise, setting them has no effect.
Legend: S = Settable bit; HC = Hardware Clearable bit; R = Readable bit; W = Writable bit
| Name: | CxTXREQ |
| Offset: | 0x2630, 0x2920 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| TXREQ[30:23] | |||||||||
| Access | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TXREQ[22:15] | |||||||||
| Access | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TXREQ[14:7] | |||||||||
| Access | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TXREQ[6:0] | TXREQ | ||||||||
| Access | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | S/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:1 – TXREQ[30:0] Message Send Request bits
1 (Object configured as a Transmit Object)Setting this
bit to ‘1’ requests sending a message.
The bit will automatically clear when the message(s) queued in the object is (are) successfully sent.
This bit can NOT be used for aborting a transmission.
TXEN = 0 (Object configured
as a Receive Object)
This bit has no effect.
Bit 0 – TXREQ Transmit Queue Message Send Request bit
Setting this bit to ‘1’ requests sending a message.
The bit will automatically clear when the message(s) queued in the object is (are) successfully sent.
This bit can NOT be used for aborting a transmission.