14.4.8 CAN Interrupt Register
Note:
- The individual bytes in this
multibyte register can be accessed with the following register names:
- CxINTT: Accesses the top byte INT[31:24].
- CxINTU: Accesses the upper byte INT[23:16].
- CxINT: Accesses the byte INT[31:0].
- Flag is set by hardware and cleared by application.
| Name: | CxINT |
| Offset: | 0x261C, 0x290C |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| IVMIE | WAKIE | CERRIE | SERRIE | RXOVIE | TXATIE | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TEFIE | MODIE | TBCIE | RXIE | TXIE | |||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| IVMIF | WAKIF | CERRIF | SERRIF | RXOVIF | TXATIF | ||||
| Access | HS/C | HS/C | HS/C | HS/C | R | R | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TEFIF | MODIF | TBCIF | RXIF | TXIF | |||||
| Access | R | HS/C | HS/C | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
Bit 31 – IVMIE Invalid Message Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Invalid message interrupt is enabled. |
| 0 | Invalid message interrupt is disabled. |
Bit 30 – WAKIE Bus Wake-up Activity Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Wake-up activity interrupt is enabled. |
| 0 | Wake-up activity interrupt is disabled. |
Bit 29 – CERRIE CAN Bus Error Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | CAN bus error interrupt is enabled. |
| 0 | CAN bus error interrupt is disabled. |
Bit 28 – SERRIE System Error Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | System error interrupt is enabled. |
| 0 | System error interrupt is disabled. |
Bit 27 – RXOVIE Receive Buffer Overflow Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Receive buffer overflow interrupt is enabled. |
| 0 | Receive buffer overflow interrupt is disabled. |
Bit 26 – TXATIE Transmit Attempt Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Transmit attempt interrupt is enabled. |
| 0 | Transmit attempt interrupt is disabled. |
Bit 20 – TEFIE Transmit Event FIFO Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Transmit event FIFO interrupt is enabled. |
| 0 | Transmit event FIFO interrupt is disabled. |
Bit 19 – MODIE Mode Change Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Mode change interrupt is enabled. |
| 0 | Mode change interrupt is disabled. |
Bit 18 – TBCIE CAN Timer Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | CAN timer interrupt is enabled. |
| 0 | CAN timer interrupt is disabled. |
Bit 17 – RXIE Receive Object Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Receive object interrupt is enabled. |
| 0 | Receive object interrupt is disabled. |
Bit 16 – TXIE Transmit Object Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Transmit object interrupt is enabled. |
| 0 | Transmit object interrupt is disabled. |
Bit 15 – IVMIF Invalid Message Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | Invalid message interrupt occurred. |
| 0 | No invalid message interrupt |
Bit 14 – WAKIF Bus Wake-up Activity Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | Wake-up activity interrupt occurred. |
| 0 | No wake-up activity interrupt |
Bit 13 – CERRIF CAN Bus Error Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | CAN bus error interrupt occurred. |
| 0 | No CAN bus error interrupt |
Bit 12 – SERRIF System Error Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | System error interrupt occurred. |
| 0 | No system error interrupt |
Bit 11 – RXOVIF Receive Buffer Overflow Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | Receive buffer overflow interrupt occurred. |
| 0 | No receive buffer overflow interrupt |
Bit 10 – TXATIF Transmit Attempt Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | Transmit attempt interrupt occurred. |
| 0 | No transmit attempt interrupt |
Bit 4 – TEFIF Transmit Event FIFO Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | Transmit event FIFO interrupt occurred. |
| 0 | No transmit event FIFO interrupt |
Bit 3 – MODIF CAN Mode Change Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | CAN module mode change occurred (OPMOD[2:0] have changed to reflect REQOP[2:0]). |
| 0 | No mode change occurred. |
Bit 2 – TBCIF CAN Timer Overflow Interrupt Flag bit(2)
| Value | Description |
|---|---|
| 1 | TBC has overflowed. |
| 0 | TBC has not overflowed. |
Bit 1 – RXIF Receive Object Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | Receive object interrupt is pending. |
| 0 | No Receive object interrupts are pending. |
Bit 0 – TXIF Transmit Object Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | Transmit object interrupt is pending. |
| 0 | No transmit object interrupts are pending. |