14.4.41 CAN 2 Mask x Register

Note:
  1. The individual bytes in this multibyte register can be accessed with the following register names:
    • CxMASKyT: Accesses the top byte MASKy[31:24]
    • CxMASKyU: Accesses the upper byte MASKy[23:16].
    • CxMASKy: Accesses the byte MASKy[31:0].
  2. Each Mask is associated with a filter.
  3. [x] denotes Filter number, from 0 to 15.
Name: C2MASKx
Offset: 0x29B4, 0x29BC, 0x29C4, 0x29CC, 0x29D4, 0x29DC, 0x29E4, 0x29EC, 0x29F4, 0x29FC, 0x2A04, 0x2A0C, 0x2A14, 0x2A1C, 0x2A24, 0x2A2C

Bit 3130292827262524 
  MIDEMSID11MEID[17:13] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 
Bit 2322212019181716 
 MEID[12:5] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 MEID[4:0]MSID[10:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 MSID[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 30 – MIDE Identifier Receive Mode bit

ValueDescription
1 Matches only message types (standard or extended address) that correspond to the EXIDE bit of in the filter.
0 Matches either standard or extended address message if filters match (i.e., if (Filter SID) = (Message SID) or if (Filter SID/EID) = (Message SID/EID)).

Bit 29 – MSID11 12th bit of Standard Identifier Mask bit

Bits 28:11 – MEID[17:0] Extended Identifier Mask bits

In DeviceNet mode, these are the mask bits for the first two data bytes.

Bits 10:0 – MSID[10:0] Standard Identifier Mask bits