12.6.38 Auxiliary PWM Generator x Capture Register

Note:
  1. APGxCAP[1:0] will read as ‘00’ in Standard Resolution mode. APGxCAP[4:0] will read as ‘00000’ in High-Resolution mode.
  2. A capture event can be manually initiated in software by writing a ‘1’ to APGxCAP[0]. The CAP bit (APGxSTAT[5]) will indicate when a new capture value is available. A read of APGxCAP will automatically clear the CAP bit and allow a new capture event to occur.
Name: APGxCAP
Offset: 0x230, 0x266, 0x29C, 0x2D2

Legend: R = Readable bit; S = Settable bit; HC = Hardware Clearable bit

Bit 15141312111098 
 PGxCAP[15:8] 
Access R/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HC 
Reset 00000000 
Bit 76543210 
 PGxCAP[7:0] 
Access R/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HC 
Reset 00000000 

Bits 15:0 – PGxCAP[15:0]  APGx Time Base Capture bits(1)