12.6.10 Auxiliary Combinatorial PWM Logic Control Register y⁽²⁾

Note:

Logic function input will be connected to ‘0’ if the APWM channel is not present.
‘y’ denotes a common instance (A-F).

Name:	ALOGCONy
Offset:	0x1E4, 0x1E6, 0x1E8, 0x1EA, 0x1EC, 0x1EE


Bit	15	14	13	12	11	10	9	8
	PWMS1y[3:0]				PWMS2y[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	S1yPOL	S2yPOL	PWMLFy[1:0]			PWMLFyD[2:0]
Access	R/W	R/W	R/W	R/W		R/W	R/W	R/W
Reset	0	0	0	0		0	0	0

Bits 15:12 – PWMS1y[3:0] Combinatorial APWM Logic Source #1 Selection bits⁽¹⁾

Value	Description
1111-1000	Reserved
`0111`	APWM4L
`0110`	APWM4H
`0101`	APWM3L
`0100`	APWM3H
`0011`	APWM2L
`0010`	APWM2H
`0001`	APWM1L
`0000`	APWM1H

Bits 11:8 – PWMS2y[3:0] Combinatorial APWM Logic Source #2 Selection bits⁽¹⁾

Value	Description
1111-1000	Reserved
`0111`	APWM4L
`0110`	APWM4H
`0101`	APWM3L
`0100`	APWM3H
`0011`	APWM2L
`0010`	APWM2H
`0001`	APWM1L
`0000`	APWM1H

Bit 7 – S1yPOL Combinatorial APWM Logic Source #1 Polarity bit

Value	Description
`1`	Input is inverted
`0`	Input is positive logic

Bit 6 – S2yPOL Combinatorial APWM Logic Source #2 Polarity bit

Value	Description
`1`	Input is inverted
`0`	Input is positive logic

Bits 5:4 – PWMLFy[1:0] Combinatorial APWM Logic Function Selection bits

Value	Description
`11`	Reserved
`10`	PWMS1 ^ PWMS2 (XOR)
`01`	PWMS1 & PWMS2 (AND)
`00`	PWMS1 \| PWMS2 (OR)

Bits 2:0 – PWMLFyD[2:0] Combinatorial APWM Logic Destination Selection bits

Value	Description
111-100	Reserved
`011`	Logic function is assigned to the APWM4H or APWM4L pin
`010`	Logic function is assigned to the APWM3H or APWM3L pin
`001`	Logic function is assigned to the APWM2H or APWM2L pin
`000`	No assignment, combinatorial APWM logic function is disabled

DS70005496D

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