12.6.76 PWM Generator x Capture Register

Note:
  1. PGxCAP[1:0] will read as ‘00’ in Standard Resolution mode. PGxCAP[4:0] will read as ‘00000’ in High-Resolution mode.
  2. A capture event can be manually initiated in software by writing a ‘1’ to PGxCAP[0]. The CAP bit (PGxSTAT[5]) will indicate when a new capture value is available. A read of PGxCAP will automatically clear the CAP bit and allow a new capture event to occur.
Name: PGxCAP
Offset: 0x35E, 0x394, 0x3CA, 0x400, 0x46C, 0x4D8

Legend: R = Readable bit; S = Settable bit; HC = Clearable bit

Bit 15141312111098 
 PGxCAP[15:8] 
Access R/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HC 
Reset 00000000 
Bit 76543210 
 PGxCAP[7:0] 
Access R/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HCR/S/HC 
Reset 00000000 

Bits 15:0 – PGxCAP[15:0]  PGx Time Base Capture bits(1)