5.34 Block Erase_32KB (BE_32KB)

The Block Erase_32KB (52H) instruction clears all bits in the selected 32-Kbyte block to 1. A Block Erase_32KB instruction applied to a protected memory area will be ignored. Before initiating any write operation, the WREN instruction must be executed. The CE# signal must remain active-low for the duration of any command sequence. To perform a Block Erase_32KB operation, the host drives CE# low, issues the Block Erase command (52h), transmits three address bytes, and then drives CE# high. Address bits [AMS-A15], where AMS represents the Most Significant Address, define the target block; the remaining address bits may be driven to either VIL or VIH. Completion of the internally self-timed Block Erase 32 KB operation can be determined by polling the BUSY bit in the STATUS register or by waiting for the specified TBE32KB duration. See Figure 5-28 and Figure 5-29 for the Block Erase sequences.

Figure 5-28. Block Erase Sequence (SPI)
Figure 5-29. Block Erase Sequence (QPI)
Note: MSN = Most Significant Nibble; LSN = Least Significant Nibble, C[1:0] = 52H