The Enable Quad I/O (EQIO) instruction (38H), enables the Flash device to operate in QPI bus mode. Prior to issuing the EQIO instruction, the IOC bit in Status Register 2 must be set to 1. If the IOC bit is set to 0, the EQIO instruction is ignored (see Figure 5-6 for the EQIO sequence).
Once the device enters QPI mode, all subsequent instructions must use 4-bit multiplexed input/output signaling until a RSTQIO instruction is executed.
When transitioning to QPI mode, the device retains the current Write Enable and Program/Erase Suspend status. However, the Wrap Length setting is reset to its default value.Figure 5-6. Enable Quad I/O Sequence (SPI)
Note: SIO[3:1] must be driven to VIH
DS20007141A
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