The MC25VF128 supports both Serial Peripheral Interface (SPI) mode and a 4-bit multiplexed QPI mode. To maintain backward compatibility with traditional SPI Serial Flash devices, the device powers up in SPI mode following a Power-On Reset (POR). In SPI mode, the device supports multi-I/O (x1/x2/x4) read and write commands. A dedicated command instruction is used to configure the device to operate in QPI mode. Data flow in QPI mode is similar to that in SPI mode; however, QPI mode uses four multiplexed I/O signals for command, address, and data sequence.
The MC25VF128 supports both Mode 0 (0,0) and Mode 3 (1,1) bus operations in both SPI and QPI modes. The difference between these modes is the state of the SCK signal when the bus host is in standby and no data are being transferred. In Mode 0, the SCK signal is low, while in Mode 3, the SCK signal is high. For both modes, the Serial Data I/O (SIO[3:0]) is sampled at the rising edge of the SCK clock signal for input and driven after the falling edge of the SCK clock signal for output. In traditional SPI mode, separate input (SI) and output (SO) data signals are used, as shown in Figure 5-1. In QPI mode, four multiplexed signals, SIO[3:0], are used for both data input and output, as shown in Figure 5-2. By using four data lines, QPI mode effectively quadruples the traditional SPI bus transfer speed at the same clock frequency, without requiring additional package pins.Figure 5-1. SPI ModeFigure 5-2. QPI Mode
DS20007141A
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