5.48 Write Enable (WREN)

The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit in Status Register 1 to 1, allowing write operations to occur.

The WREN instruction must be executed prior to any of the following operations: writing nonvolatile values using Write Status Register 1/2/3, Sector Erase, Block Erase_32KB, Block Erase_64KB, Chip Erase, Page Program, SPI Quad Input Page Program, SPI Quad Page Program, Program Security Registers 1/2/3 and Erase Security Registers 1/2/3.

To execute a Write Enable operation, the host drives CE# low, issues the Write Enable command (06H) in SPI or QPI mode, and then drives CE# high. See Figure 5-41 and Figure 5-42 for the WREN instruction sequence.

Figure 5-41. Write Enable Sequence (SPI)
Figure 5-42. Write Enable Sequence (QPI)
Note: C[1:0] = 06H