5.26 DTR Read Burst with Wrap in QPI Mode (DTR_RBQPI)

The DTR Read Burst with Wrap in QPI Mode (0EH) instruction enables wrap-around read operation in DTR QPI mode. Both the wrap length and the number of dummy clock cycles are configured using the Set Read Parameters (C0H) instruction.

In QPI mode, the host initiates the operation by issuing the 0EH command. The device then switches to 4‑bit I/O operation with dual data rate to receive the 3‑byte address, followed by the required dummy clock cycles. After the dummy clocks, the device outputs data on SIO[3:0] on both edges of the clock signal, starting from the specified address. During the read operation, the internal Address Pointer automatically increments until the final byte of the configured burst length is reached, after which it wraps around to the first byte of the same burst region. All burst operations are aligned within the selected burst length. For example, with a burst length of eight bytes and a starting address of 06h, the read sequence proceeds as follows: 06h, 07h, 00h, 01h, 02h, 03h, 04h, 05h, 06h, and so on. This pattern repeats continuously until the operation is terminated by a low‑to‑high transition on CE#.